Fetch Execution Cycle: Registers and Memory

Registers

This is the sequence of steps that happens when the CPU (Central Processing Unit) fetches an instruction from the memory. It involves several registers inside the CPU - specifically, the Program Counter. Here are a summary of the registers needed:

  • The program counter is the register that holds the memory address of the current instruction being executed. When the next instruction is to be fetched, this register is incremented by the appropriate number of bytes.

  • Some CPUs contain a memory address register, which holds the address of the byte being loaded. This doesn't necessarily mean the instruction byte, as several instructions have one or more bytes as operands (i.e. that follow the instruction). Other CPUs don't have this register. They simply increase the program counter and use it to fetch the next byte(s) into memory.

  • CPUs contain general registers. The registers are small units of memory that the Control Unit and the ALU use for the storage of intermediate results and control information. The number and size of the registers depends upon the particular computer. Typically there will be sixteen or thirty two General Purpose Registers.

  • In the CPU, there is a status register (also called the condition codes register) which indicates various things about the last calculation carried out. For instance, there is a zero flag (which is set to true if the last calculation produced a zero), a carry flag (true if the last calculation produced a carry out i.e. an overflow) etc.

Communication between CPU and memory

There are various wires that connect the CPU to the memory. Whenever the CPU needs to read (or write) a byte of data to/from the memory, it specifies the address of the byte on a set of wires called the address bus. The data itself is placed on a set of wires called the data bus. The address bus is unidrectional - meaning that the CPU specifies addresses, but the memory doesn't. The data bus is bidirectional - both the CPU and the memory can place information on it.

As well as these buses, there is another set of wires called the control bus. These specify whether the memory is being read or written to and send signals from the CPU to the memory (or vice-versa) that the data is ready on the various buses.

One wire in the control bus is referred to as Read/Write or (R/W). This is set to binary "1" (the voltage representing "true" - typically 5 volts) to indicate that the memory is to be read, and to binary "0" (the voltage representing "false" - typically 0 volts) to indicate that the memory is to be written to. The line is sometimes written with a line over the W to show that it is the 0 value that means write, not the 1 value. Similarly, there is an address bus ready line (often called address bus enable), which is set to 1 by the processor whenever there is a valid address on the address bus (it is the signal that says to the memory "Address is ready - come and get it!"), and a similar signal, data bus ready (or data bus enable), which either the memory or the CPU can set.